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    <title>The Next Generation GHz TTL / CMOS Technology</title>
    <link rel="alternate" type="text/html" href="http://potatosemi.com/blog/" />
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   <id>tag:potatosemi.com,2008:/blog/1</id>
    <link rel="service.post" type="application/atom+xml" href="http://potatosemi.com/blog-mt/mt-atom.cgi/weblog/blog_id=1" title="The Next Generation GHz TTL / CMOS Technology" />
    <updated>2008-04-23T05:52:05Z</updated>
    <subtitle>Potato Semiconductor Corporation |  www.PotatoSemi.com</subtitle>
    <generator uri="http://www.sixapart.com/movabletype/">Movable Type 3.2ysb5-20051201</generator>
 
<entry>
    <title>74G clock buffer</title>
    <link rel="alternate" type="text/html" href="http://potatosemi.com/blog/2008/04/74g_clock_buffer.html" />
    <link rel="service.edit" type="application/atom+xml" href="http://potatosemi.com/blog-mt/mt-atom.cgi/weblog/blog_id=1/entry_id=10" title="74G clock buffer" />
    <id>tag:potatosemi.com,2008:/blog//1.10</id>
    
    <published>2008-04-17T03:51:41Z</published>
    <updated>2008-04-23T05:52:05Z</updated>
    
    <summary><![CDATA[ Feedback from PotatoSemi: I will like to share &amp; discuss some technical information with you. When you use our clock buffer, we prefer that you can connect the entire clock buffer outputs without any open circuit. For example, when...]]></summary>
    <author>
        <name>potatosemi</name>
        
    </author>
            <category term="Comments" />
    
    <content type="html" xml:lang="en" xml:base="http://potatosemi.com/blog/">
        <![CDATA[<table width="532" border="0" cellspacing="1" cellpadding="5" bgcolor="#d4d4d4">
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				<td bgcolor="#c7eaf1" width="520">Feedback from PotatoSemi:</td>
			</tr>
			<tr>
				<td bgcolor="white" width="520">I will like to share &amp; discuss some technical information with you. When you use our clock buffer, we prefer that you can connect the entire clock buffer outputs without any open circuit. For example, when you use 3807 1 to 10 clock buffer, the best case will be 10 outputs connect to 10 similar loads. If in case that you only use 9 outputs, please add a dummy loading capacitor to the 1 left open output to make the termination. So the 10 output signals will switch about the same time. Any output signal without loading will switch much faster then the other output signal with loading. Much faster switching &amp; delay time from open output signal will increase noise &amp; jitter. The equal loading &amp; same output trace length are important when you use clock buffers. Please let me know if you have any question or comment.<br />
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				<td bgcolor="#d4d4d4" width="520">Comments:</td>
			</tr>
			<tr>
				<td bgcolor="white" width="520">I understand your comment and usually terminate unused outputs. However, I have wondered what the tradeoff is between equalizing loading and delta I noise.
					<p>If you leave the unused outputs open circuited, you will get a noise spike that is not coincident with the other channels. However, the current spike is mostly due to the overlap of PMOS/NMOS switching. If you add a load capacitance, you then add the current spikes from charge/discharging the load capacitance to the current spikes. How large are the two components?<br />
						
						 Do you have any waveforms that compare the two situations?<br />
					</p>
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		<br />
		<table width="531" border="0" cellspacing="1" cellpadding="5" bgcolor="#d4d4d4">
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				<td bgcolor="#c7eaf1" width="519">Feedback from PotatoSemi:</td>
			</tr>
			<tr>
				<td bgcolor="white" width="519">CMOS circuits have been used for over 50 years. All the CMOS circuit ICs have spike except potato chips. We have the technology to kill the spike so our products can run much higher frequency. You can see the comparison from the attached file. The left side is our 3807 with noise kill circuit. The right hand side is the normal 3807. All of them are running in same condition with 10 outputs switching at the same time. The output is driving 15pf loading. Now, you can see why the 3807 from other semiconductor companies can not run beyond 200MHz. Spike is the only reason. People also call them ground bounce or noise. Jitter is also related to the noise. They are all the same thing. We make our noise kill circuit perfect matching 8pf loading. If your loading is more far away, the chip ground noise will slightly higher. You can see the attached file for example. That output is driving 15pf loading. This is the reason we recommend our customers to add 8pf termination capacitor to the open output. This termination capacitor is only good for our GHz CMOS output circuit. Termination capacitor is no use to the regular CMOS outputs. This is just like what you said. They are going to be noisy anyway which does not matter you add the capacitor or not.<br />
					<br />
					<hr />
				</td>
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		<br />
		<table width="531" border="0" cellspacing="1" cellpadding="5" bgcolor="#d4d4d4">
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				<td bgcolor="#d4d4d4" width="519">Comments:</td>
			</tr>
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				<td bgcolor="white" width="519">Thanks for the information. In my specific application, I am driving a 50 ohm transmission line with an AC coupled 50 ohm termination. Do you still recommend using the same load as a dummy termination for unused outputs?</td>
			</tr>
		</table>
		<br />
		<table width="531" border="0" cellspacing="1" cellpadding="5" bgcolor="#d4d4d4">
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				<td bgcolor="#c7eaf1" width="519">Feedback from PotatoSemi:</td>
			</tr>
			<tr>
				<td bgcolor="white" width="519">Yes. I still recommend adding 8pf dummy termination for unused outputs. Our noise kill circuit will work anyway which does not matter the loading is 0pf or 15pf. The 8pf dummy is only for the fine tune. Of cause, the best scenario is no dummy output. All the dummy outputs will waste power..</td>
			</tr>
		</table>
		<br />]]>
        
    </content>
</entry>
<entry>
    <title>74G clock buffer</title>
    <link rel="alternate" type="text/html" href="http://potatosemi.com/blog/2008/03/samples_of_74g_clock_buffer.html" />
    <link rel="service.edit" type="application/atom+xml" href="http://potatosemi.com/blog-mt/mt-atom.cgi/weblog/blog_id=1/entry_id=9" title="74G clock buffer" />
    <id>tag:potatosemi.com,2008:/blog//1.9</id>
    
    <published>2008-03-01T03:32:36Z</published>
    <updated>2008-04-23T05:27:41Z</updated>
    
    <summary>I measured the 1:4 and 1:10 clock buffers and noticed a change in edge speeds. The 1:4 measured at 256psec and 272psec rise/fall. (This compares with 204psec rise and 284ps fall for the 1:2 buffer). The average is slightly slower,...</summary>
    <author>
        <name>potatosemi</name>
        
    </author>
            <category term="Comments" />
    
    <content type="html" xml:lang="en" xml:base="http://potatosemi.com/blog/">
        <![CDATA[<p>I measured the 1:4 and 1:10 clock buffers and noticed a change in <br />
			edge speeds. The 1:4 measured at 256psec and 272psec rise/fall. <br />
			(This compares with 204psec rise and 284ps fall for the 1:2 buffer). <br />
			The average is slightly slower, but the edges are more symmetrical.<br />
		</p>
		<p>I expected the 1:4 might be slightly slower due to the larger fan <br />
			out internal to the buffer than for the 1:2. However, I expected <br />
			that since the<br />
			1:2 package heavily favors the GND return path, that the fall time <br />
			would be much faster than the rise time, contrary to the <br />
			measurements.<br />
		</p>
		<p>The 1:10 measured at 272ps rise and 264ps fall, slightly slower <br />
			still, but very symmetrical edges.<br />
			<br />
		</p>
		<p></p>
		<p>Thank you,<br />
			<br />
			------/ --/ -----/ -----/IBM@IBMUS<br />
		</p>
		<p><img src="http://www.potatosemi.com/potato_blog/pic17445.jpg" alt="" width="640" height="480" border="0" />Drive 50 Ohm load<br />
			<img src="http://www.potatosemi.com/potato_blog/pic03461.jpg" alt="" width="640" height="480" border="0" />Drive 50 Ohm load</p>
		<p></p>]]>
        
    </content>
</entry>
<entry>
    <title>PotatoSemi GHz TTL Logic</title>
    <link rel="alternate" type="text/html" href="http://potatosemi.com/blog/2008/02/regular_ttl_logic_vs_ecl_logic.html" />
    <link rel="service.edit" type="application/atom+xml" href="http://potatosemi.com/blog-mt/mt-atom.cgi/weblog/blog_id=1/entry_id=2" title="PotatoSemi GHz TTL Logic" />
    <id>tag:potatosemi.com,2008:/blog//1.2</id>
    
    <published>2008-02-08T13:55:08Z</published>
    <updated>2008-02-08T14:21:17Z</updated>
    
    <summary> Regular TTL logic Advantage 1. Easy to use. 2. Only need decupling capacitor. No extra component is needed. 3. No static current. Disadvantage 1. High Noise 2. Low operating frequency 3. High jitter. 4. High Propagation Delay 5. Week...</summary>
    <author>
        <name>potatosemi</name>
        
    </author>
            <category term="Technology" />
    
    <content type="html" xml:lang="en" xml:base="http://potatosemi.com/blog/">
        <![CDATA[<body>
		<p><strong><font color="#149599">Regular TTL logic <br />
				</font></strong><br />
			Advantage <br />
			<br />
			1. Easy to use. <br />
			2. Only need decupling capacitor. No extra component is needed. <br />
			3. No static current. <br />
			<br />
			Disadvantage <br />
			<br />
			1. High Noise <br />
			2. Low operating frequency <br />
			3. High jitter. <br />
			4. High Propagation Delay <br />
			5. Week output signal <br />
			6. Signal is not able to run through cable. <br />
			<br />
			<img src="http://www.potatosemi.com/download/Picture_6.jpg" alt="" width="249" height="220" align="right" border="0" /><strong><font color="#149599">ECL logic <br />
				</font><br />
			</strong>Advantage <br />
			<br />
			1. Run high frequency. <br />
			2. Low noise. <br />
			3. Low jitter. <br />
			4. Output signal can run through cable. <br />
			<br />
			Disadvantage <br />
			<br />
			1. Difficult to use. <br />
			2. Need many extra components such as 50 ohm loading resistors. <br />
			3. Need two wires to represent one bit. <br />
			4. High static current. <br />
			5. Burn electricity power when the system is idle. Waste energy. <br />
			<br />
			<font color="#149599"><img src="http://www.potatosemi.com/download/Picture_7.jpg" alt="" width="245" height="209" align="right" border="0" /><strong>The Next Generation GHz TTL Logic <br />
				</strong></font><strong>
				
				(PotatoSemi Technology) <br />
				<br />
			</strong>Advantage <br />
			<br />
			1. Strong output signal. <br />
			2. Run high frequency. <br />
			3. Low noise. <br />
			4. Low jitter. <br />
			5. Output signal can run through cable. <br />
			6. Only one wire for one bit <br />
			7. Easy to use. <br />
			8. Embedded decupling capacitor. <br />
			9. Power up and run. No extra component is needed. <br />
			10. No static current. Do not waste power. Power saving. Environment friendly. <br />
		</p>
	</body>]]>
        
    </content>
</entry>
<entry>
    <title>PotatoSemi GHz TTL Logic- Clock Buffer</title>
    <link rel="alternate" type="text/html" href="http://potatosemi.com/blog/2008/02/potatosemi_ghz_ttl_logic_clock.html" />
    <link rel="service.edit" type="application/atom+xml" href="http://potatosemi.com/blog-mt/mt-atom.cgi/weblog/blog_id=1/entry_id=1" title="PotatoSemi GHz TTL Logic- Clock Buffer" />
    <id>tag:potatosemi.com,2008:/blog//1.1</id>
    
    <published>2008-02-08T08:54:48Z</published>
    <updated>2008-02-08T19:11:38Z</updated>
    
    <summary> Regular Clock Buffer Advantage 1. Easy to use. 2. Clock source is from crystal oscillator. 3. Only need decupling capacitor. No extra component is needed. 4. No static current. Disadvantage 1. High Noise. 2. Low operating frequency. 3. Large...</summary>
    <author>
        <name>potatosemi</name>
        
    </author>
            <category term="Technology" />
    
    <content type="html" xml:lang="en" xml:base="http://potatosemi.com/blog/">
        <![CDATA[<body>
		<p><strong><font color="#149599">Regular Clock Buffer</font></strong></p>
		<p>Advantage<br />
			1. Easy to use.<br />
			2. Clock source is from crystal oscillator.<br />
			3. Only need decupling capacitor. No extra component is needed.<br />
			4. No static current.</p>
		<p>Disadvantage<br />
			1. High Noise.<br />
			2. Low operating frequency.<br />
			3. Large Propagation Delay.<br />
			3. High jitter.<br />
			4. Week output signal.<br />
			5. Signal is not able to run through cable.</p>
		<p><br />
			<strong><font color="#149599">Zero Delay Clock Buffer<br />
				</font><br />
			</strong>
			Advantage<br />
			1. Zero Delay.</p>
		<p>Disadvantage<br />
			1. Shift clock source from crystal oscillator to PLL local oscillator.<br />
			2. High Noise.<br />
			3. Low operating frequency.<br />
			4. High jitter.<br />
			5. Week output signal.<br />
			6. Signal is not able to run through cable.</p>
		<p><br />
			<strong><font color="#149599">ECL Clock buffer<br />
				</font><br />
			</strong>
			Advantage<br />
			1. Small propagation delay.<br />
			2. Clock source is from crystal oscillator.<br />
			3. Run high frequency.<br />
			4. Low noise.<br />
			5. Low jitter.<br />
			6. Can run through cable.</p>
		<p>Disadvantage<br />
			1. Difficult to use.<br />
			2. Need many extra components such as 50 ohm loading resistors.<br />
			3. Need two wires to represent one bit.<br />
			5. Waste PCB space.<br />
			5. Current source design. High static current. <br />
			6. Burn electricity power when the system is idle. Waste energy.</p>
		<p><strong><font color="#149599">The Next Generation GHz CMOS Clock Buffer<br />
				</font>
				(PotatoSemi Clock Buffer)</strong><br />
			<br />
				Advantage<br />
				1. Small propagation delay.<br />
				2. Clock source is from crystal oscillator.<br />
				3. Strong output signal.<br />
				4. Run high frequency.<br />
				5. Low noise.<br />
				6. Low jitter.<br />
				7. Can run through cable.<br />
				8. Only one wire for one bit.<br />
				9. Easy to use.<br />
			10. Embedded decupling capacitor. <br />
				11. Power up and run. No extra component is needed.<br />
			12. Voltage source design. No static current. <br />
				13. Do not waste power. Power saving. Environment friendly.</p>
		<p><br />
		</p>
	</body>

]]>
        
    </content>
</entry>
<entry>
    <title>PO100HSTL23A</title>
    <link rel="alternate" type="text/html" href="http://potatosemi.com/blog/2008/02/po100hstl23a.html" />
    <link rel="service.edit" type="application/atom+xml" href="http://potatosemi.com/blog-mt/mt-atom.cgi/weblog/blog_id=1/entry_id=6" title="PO100HSTL23A" />
    <id>tag:potatosemi.com,2008:/blog//1.6</id>
    
    <published>2008-02-06T19:27:09Z</published>
    <updated>2008-03-26T12:47:52Z</updated>
    
    <summary>We just finished testing this device (PO100HSTL23A) in several circuits on a new product and found its performance to be OUTSTANDING. We are definitely going to look at using it in our other products to improve yield and jitter performance....</summary>
    <author>
        <name>potatosemi</name>
        
    </author>
            <category term="Comments" />
    
    <content type="html" xml:lang="en" xml:base="http://potatosemi.com/blog/">
        <![CDATA[<p>We just finished testing this device (PO100HSTL23A) in several circuits<br />
on a new product and found its performance to be OUTSTANDING. We are<br />
definitely going to look at using it in our other products to improve<br />
yield and jitter performance. The ability to drive different impedance<br />
loads with well behaved "fast" edges (on-board as well as coax cables)<br />
with very little power supply noise is amazing.</p>

<p>I just want to thank your company for making this product. We will<br />
seriously be looking at your other products to see how we can use them<br />
in existing and future products.</p>

<p>Lastly, if you want to send us some literature on how you pulled this<br />
off I would be very interested. I would also appreciate any Spice<br />
models if you have any available. They can be pseudo models as long as<br />
their transmission line properties are retained.</p>

<p>Thanks,</p>

<p>-- <br />
Chase Scientific Company</p>]]>
        
    </content>
</entry>
<entry>
    <title>New Bus Switch Datasheet updated</title>
    <link rel="alternate" type="text/html" href="http://potatosemi.com/blog/2008/02/new_bus_switch_datasheet_avail.html" />
    <link rel="service.edit" type="application/atom+xml" href="http://potatosemi.com/blog-mt/mt-atom.cgi/weblog/blog_id=1/entry_id=7" title="New Bus Switch Datasheet updated" />
    <id>tag:potatosemi.com,2008:/blog//1.7</id>
    
    <published>2008-02-05T20:00:58Z</published>
    <updated>2008-02-08T20:18:29Z</updated>
    
    <summary> All Bus Switch PO3B3257A Wide Bandwidth, Quad 2:1 Mux/DeMux PO3B3125A High-Bandwidth, 4-Bit, 2-Port Bus Switch w/ Individual Enables PO3B3126A High-Bandwidth, 4-Bit, 2-Port Bus Switch w/ Individual Enables PO3VT3306A High-Bandwidth, Hot-Insertion, 2-Bit, 2-Port, Low Voltage Translator Bus Switch PO3B10A Wide...</summary>
    <author>
        <name>potatosemi</name>
        
    </author>
            <category term="Product Updated" />
    
    <content type="html" xml:lang="en" xml:base="http://potatosemi.com/blog/">
        <![CDATA[<body>
		<table width="541" border="0" cellspacing="0" cellpadding="2">
			<tr height="34">
				<td class="con9" align="left" width="119" height="34"><img src="http://www.potatosemi.com/2007/images/in_s_icon2.gif" alt="" height="12" width="12" align="absmiddle" border="0" /><a href="http://www.potatosemi.com/2007/products_bus_switch.html">All Bus Switch</a></td>
				<td class="con8" width="394" height="34"></td>
				<td height="34"></td>
			</tr>
			<tr>
				<td class="con9" align="left" width="119"><img src="http://www.potatosemi.com/2007/images/in_s_icon2.gif" alt="" height="12" width="12" align="absmiddle" border="0" /><strong><a href="http://www.potatosemi.com/datasheet/PO3B3257A.pdf" target="_blank">PO3B3257A</a></strong></td>
				<td class="con8" width="394"><font color="#555555">Wide Bandwidth, Quad 2:1 Mux/DeMux</font></td>
				<td><a href="http://www.potatosemi.com/datasheet/PO3B3257A.pdf" target="_blank"><img src="http://www.potatosemi.com/2007/images/acrobat.gif" alt="" height="18" width="16" border="0" /></a></td>
			</tr>
			<tr height="7">
				<td class="con8" colspan="3" height="7" background="http://www.potatosemi.com/2007/images/end_line_520.gif"></td>
			</tr>
			<tr>
				<td class="con9" align="left" width="119"><img src="http://www.potatosemi.com/2007/images/in_s_icon2.gif" alt="" height="12" width="12" align="absmiddle" border="0" /><strong><a href="http://www.potatosemi.com/datasheet/PO3B3125A.pdf" target="_blank">PO3B3125A</a></strong></td>
				<td class="con8" width="394"><font color="#555555">High-Bandwidth, 4-Bit, 2-Port Bus Switch w/ Individual Enables</font></td>
				<td><a href="http://www.potatosemi.com/datasheet/PO3B3125A.pdf" target="_blank"><img src="http://www.potatosemi.com/2007/images/acrobat.gif" alt="" height="18" width="16" border="0" /></a></td>
			</tr>
			<tr height="7">
				<td class="con8" colspan="3" align="left" height="7" background="http://www.potatosemi.com/2007/images/end_line_520.gif"></td>
			</tr>
			<tr>
				<td class="con9" align="left" width="119"><img src="http://www.potatosemi.com/2007/images/in_s_icon2.gif" alt="" height="12" width="12" align="absmiddle" border="0" /><strong><a href="http://www.potatosemi.com/datasheet/PO3B3126A.pdf" target="_blank">PO3B3126A</a></strong></td>
				<td class="con8" width="394"><font color="#555555">High-Bandwidth, 4-Bit, 2-Port Bus Switch w/ Individual Enables</font></td>
				<td><a href="http://www.potatosemi.com/datasheet/PO3B3126A.pdf" target="_blank"><img src="http://www.potatosemi.com/2007/images/acrobat.gif" alt="" height="18" width="16" border="0" /></a></td>
			</tr>
			<tr height="7">
				<td class="con8" colspan="3" align="left" height="7" background="http://www.potatosemi.com/2007/images/end_line_520.gif"></td>
			</tr>
			<tr>
				<td class="con9" align="left" width="119"><img src="http://www.potatosemi.com/2007/images/in_s_icon2.gif" alt="" height="12" width="12" align="absmiddle" border="0" /><strong><a href="http://www.potatosemi.com/datasheet/PO3VT3306A.pdf" target="_blank">PO3VT3306A</a></strong></td>
				<td class="con8" width="394"><font color="#555555">High-Bandwidth, Hot-Insertion, 2-Bit, 2-Port, Low Voltage Translator Bus Switch</font></td>
				<td><a href="http://www.potatosemi.com/datasheet/PO3VT3306A.pdf" target="_blank"><img src="http://www.potatosemi.com/2007/images/acrobat.gif" alt="" height="18" width="16" border="0" /></a></td>
			</tr>
			<tr height="7">
				<td class="con8" colspan="3" align="left" height="7" background="http://www.potatosemi.com/2007/images/end_line_520.gif"></td>
			</tr>
			<tr>
				<td class="con9" align="left" width="119"><img src="http://www.potatosemi.com/2007/images/in_s_icon2.gif" alt="" height="12" width="12" align="absmiddle" border="0" /><strong><a href="http://www.potatosemi.com/datasheet/PO3B10A.pdf" target="_blank">PO3B10A</a></strong></td>
				<td class="con8" width="394"><font color="#555555">Wide Bandwidth, 2-Channel, 2:1 Mux/ DeMux w/ Single Enable</font></td>
				<td><a href="http://www.potatosemi.com/datasheet/PO3B10A.pdf" target="_blank"><img src="http://www.potatosemi.com/2007/images/acrobat.gif" alt="" height="18" width="16" border="0" /></a></td>
			</tr>
			<tr height="7">
				<td class="con8" colspan="3" align="left" height="7" background="http://www.potatosemi.com/2007/images/end_line_520.gif"></td>
			</tr>
			<tr>
				<td class="con9" align="left" width="119"><img src="http://www.potatosemi.com/2007/images/in_s_icon2.gif" alt="" height="12" width="12" align="absmiddle" border="0" /><strong><a href="http://www.potatosemi.com/datasheet/PO3B22A.pdf" target="_blank">PO3B22A</a></strong></td>
				<td class="con8" width="394"><font color="#555555">Wide Bandwidth, Dual 2:1 Mux/DeMux</font></td>
				<td><a href="http://www.potatosemi.com/datasheet/PO3B22A.pdf" target="_blank"><img src="http://www.potatosemi.com/2007/images/acrobat.gif" alt="" height="18" width="16" border="0" /></a></td>
			</tr>
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				<td class="con8" colspan="3" align="left" height="7" background="http://www.potatosemi.com/2007/images/end_line_520.gif"></td>
			</tr>
		</table>
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	</body>
]]>
        
    </content>
</entry>
<entry>
    <title>There are 3 ways to reduce EMI.</title>
    <link rel="alternate" type="text/html" href="http://potatosemi.com/blog/2008/01/there_are_3_ways_to_reduce_emi.html" />
    <link rel="service.edit" type="application/atom+xml" href="http://potatosemi.com/blog-mt/mt-atom.cgi/weblog/blog_id=1/entry_id=5" title="There are 3 ways to reduce EMI." />
    <id>tag:potatosemi.com,2008:/blog//1.5</id>
    
    <published>2008-01-08T14:44:16Z</published>
    <updated>2008-02-08T14:47:34Z</updated>
    
    <summary>First one is adding shielding materials. Advantage: It will seal the radiation inside your system. Disadvantage: high cost. Second one is to use spread spectrum oscillator. Advantage: lower down the EMI with low extra cost. Disadvantage: Using spread spectrum means...</summary>
    <author>
        <name>potatosemi</name>
        
    </author>
            <category term="Technology" />
    
    <content type="html" xml:lang="en" xml:base="http://potatosemi.com/blog/">
        <![CDATA[<p>First one is adding shielding materials.</p>

<p>Advantage: <br />
It will seal the radiation inside your system.</p>

<p>Disadvantage: <br />
high cost.<br />
 <br />
Second one is to use spread spectrum oscillator.</p>

<p>Advantage: <br />
lower down the EMI with low extra cost.</p>

<p>Disadvantage:<br />
Using spread spectrum means adding jitter. It is going to increase your system bit error rate. It may cause the system failure.<br />
We have this kind of experience with one of our customer.<br />
 <br />
The third one is using high frequency & high performance crystal oscillator or ICs.</p>

<p>Advantage: <br />
This kind of products are low noise inside, so they can run into high frequency & usually generate much less radiation. All of our products are designed with extremely low noise & high frequency. The EMI radiation is from the sum of all the ICs inside your system. By carefully choosing driver ICs such as crystal oscillator, clock buffer, TTL logic etc. can reduce the total EMI radiation from your system.</p>

<p>Disadvantage:<br />
If the high radiation is from the main chip that you are not able to change, you will not be able to fix your EMI problem.</p>]]>
        
    </content>
</entry>
<entry>
    <title>High frequency low noise CMOS output driver</title>
    <link rel="alternate" type="text/html" href="http://potatosemi.com/blog/2007/06/high_frequency_low_noise_cmos.html" />
    <link rel="service.edit" type="application/atom+xml" href="http://potatosemi.com/blog-mt/mt-atom.cgi/weblog/blog_id=1/entry_id=3" title="High frequency low noise CMOS output driver" />
    <id>tag:potatosemi.com,2008:/blog//1.3</id>
    
    <published>2007-06-08T14:22:51Z</published>
    <updated>2008-02-08T14:31:18Z</updated>
    
    <summary>CMOS technology has been widely used for more then 40 years. It delivers the low cost with high yield. However, because of the unbalanced CMOS structure, it will generate high noise into Power &amp; ground....</summary>
    <author>
        <name>potatosemi</name>
        
    </author>
            <category term="Technology" />
    
    <content type="html" xml:lang="en" xml:base="http://potatosemi.com/blog/">
        <![CDATA[<p>CMOS technology has been widely used for more then 40 years. It delivers the low cost with high yield. However, because of the unbalanced CMOS structure, it will generate high noise into Power & ground.</p>]]>
        <![CDATA[<p>From the past 40 years of IC history, our GHz CMOS output driver is the only technology that you can reduce your chip internal ground and power noise without scarifies your output performance. Because of this low noise technology, our output frequency can be 7 to 10 times faster then anyone else in this world. In addition, because of this low noise technology, any ICs with our output drivers can deliver the accuracy without any error. The example below shows the output signal from our standard logic 74G32. The VCC is 3V. The output frequency from the measurement is 2GHz with probe load. The max frequency will be more than 2GHz. Vp-p is 2.075V. Vhigh is 2.175V. Vlow is 100mV.<br />
<img src="http://www.potatosemi.com/2007/images/output_frequency2.jpg" alt="" align="right" border="0" /><br />
</p>]]>
    </content>
</entry>
<entry>
    <title>Potato Semiconductor Corporation</title>
    <link rel="alternate" type="text/html" href="http://potatosemi.com/blog/2007/01/potato_semiconductor_corporati.html" />
    <link rel="service.edit" type="application/atom+xml" href="http://potatosemi.com/blog-mt/mt-atom.cgi/weblog/blog_id=1/entry_id=4" title="Potato Semiconductor Corporation" />
    <id>tag:potatosemi.com,2007:/blog//1.4</id>
    
    <published>2007-01-15T14:35:45Z</published>
    <updated>2008-02-08T14:38:53Z</updated>
    
    <summary>Potato Semiconductor Corporation dedicates to developing chip to chip IO interface solution for high speed integrated circuits. We focus on GHz 74 logic, clock buffer, IO translator, bus switch &amp; customized IO interface. Potato Semiconductor Corporation is a fabless IC...</summary>
    <author>
        <name>potatosemi</name>
        
    </author>
            <category term="PotatoSemi" />
    
    <content type="html" xml:lang="en" xml:base="http://potatosemi.com/blog/">
        <![CDATA[<p>Potato Semiconductor Corporation dedicates to developing chip to chip IO interface solution for high speed integrated circuits.  We focus on GHz 74 logic, clock buffer, IO translator, bus switch & customized IO interface.</p>

<p>Potato Semiconductor Corporation is a fabless IC design house which locates in San Jose, California.  With our powerful leading technology in IO interface, logic cells & unique design rule, we can improve most of existing standard logic chips into higher speed ones.  The chips will become much more reliable, with much less noise and much higher operating frequency than the same devices from other Semiconductor companies.  Take a look at our products and do the comparison yourself.  When you compare them apple to apple, you will find out that our chips can run much faster with much higher frequency then the others.</p>

<p>What We Do<br />
By using our special IO interface, logic cells & design rule, we can convert most of existing Logic chips into much higher frequency than it was before.  We will continue to convert existing standard chips to become the chips which are much more reliable, much less noise and much higher running frequency<br />
</p>]]>
        
    </content>
</entry>
<entry>
    <title>Feedback to PotatoSemi</title>
    <link rel="alternate" type="text/html" href="http://potatosemi.com/blog/2006/03/feedback_to_potatosemi.html" />
    <link rel="service.edit" type="application/atom+xml" href="http://potatosemi.com/blog-mt/mt-atom.cgi/weblog/blog_id=1/entry_id=8" title="Feedback to PotatoSemi" />
    <id>tag:potatosemi.com,2006:/blog//1.8</id>
    
    <published>2006-03-08T03:27:41Z</published>
    <updated>2008-03-08T03:31:58Z</updated>
    
    <summary>please send your feedback to potatosemi at: Feedback@potatosemi.com Many Thanks...</summary>
    <author>
        <name>potatosemi</name>
        
    </author>
            <category term="Feedback" />
    
    <content type="html" xml:lang="en" xml:base="http://potatosemi.com/blog/">
        <![CDATA[please send your feedback to potatosemi at:<br>
<br>
Feedback@potatosemi.com<br>
<br>
Many Thanks<br>
<br>
]]>
        
    </content>
</entry>

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